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yannickreiss
2023-11-09 21:55:56 +01:00
parent 1eae0ed13b
commit 891f830cb4
5 changed files with 33 additions and 35 deletions
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spell/de.utf-8.add
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@@ -266,3 +266,27 @@ Latency
PDLT
SWT
Performancegewinn
auch
toolchain
EDA
Entwicklungswerkzeuge
Progenitor
software
concept
proof
VexRISCV
litex
VexRiscv
Vivado
FPGAs
Low
OpenWRT
VecRiscv
buildroot
High
TPM
modules
platform
trusted
VE
Waveform