brainfuck_processor/fpga/.tmp_logic.md

Branch redesign

Skip new logic table

instruction	cell	skip	nest		skip
[	0	0	0		1
[	0	1	0		1
[	0	1	1		1
[	1	0	0		0
[	1	1	0		1
[	1	1	1		1

skip = not ( cell and (skip nor nest) )

instruction	cell	skip	nest		skip
]	-	0	0		0
]	-	1	0		0
]	-	1	1		1

skip = skip and nest