Implement push and pop in branch

This commit is contained in:
Yannick Reiß 2023-09-27 20:44:03 +02:00
parent 30559c81a9
commit f906a6e4a3
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GPG Key ID: 5A3AF456F0A0338C
2 changed files with 46 additions and 12 deletions

View File

@ -78,6 +78,7 @@ architecture arch of bfpu is
cell_value : in std_logic_vector(7 downto 0);
skip : out std_logic;
jump : out std_logic;
pc_enable : out std_logic;
pc_out : out std_logic_vector(7 downto 0)
);
@ -86,7 +87,6 @@ architecture arch of bfpu is
signal s_clk : std_logic;
signal s_instrAddr : std_logic_vector(7 downto 0);
signal s_instruction : std_logic_vector(2 downto 0);
signal s_instrAddr_branch : std_logic_vector(7 downto 0);
signal s_cell_out : std_logic_vector(7 downto 0);
signal s_cell_in : std_logic_vector(7 downto 0);
@ -162,8 +162,9 @@ begin
instr_addr => s_instrAddr,
cell_value => s_cell_out,
skip => s_skip,
jump => s_jmp_pc,
pc_enable => s_enable_pc,
pc_out => s_instrAddr_branch
pc_out => s_jmp_addr_pc
);
s_enable_ptr <= s_skip and s_enable_ptr_o;

View File

@ -16,6 +16,7 @@ entity branch is
skip : out std_logic;
pc_enable : out std_logic;
jump : out std_logic;
pc_out : out std_logic_vector(7 downto 0)
);
end branch;
@ -26,10 +27,9 @@ architecture impl of branch is
signal addr_stack : stack := (others => (others => '0'));
signal nested : std_logic_vector(7 downto 0) := (others => '0'); -- count nested loops
signal jump_destination : std_logic_vector(7 downto 0);
signal skip_internal : std_logic := '0';
signal stack_ptr : std_logic_vector(7 downto 0) := (others => '0');
signal push_state : std_logic;
signal push_state : std_logic := '1';
begin
@ -42,7 +42,7 @@ begin
end if;
end if;
end process;
-- Process p_continue: set skip to false
p_continue : process (clk)
begin
@ -52,7 +52,7 @@ begin
end if;
end if;
end process;
-- Process p_nest : raise nest by one as [ is passed
p_nest : process (clk)
begin
@ -62,7 +62,7 @@ begin
end if;
end if;
end process;
-- Process p_unnest : lower nest, as ] is passed
p_unnest : process (clk)
begin
@ -72,19 +72,52 @@ begin
end if;
end if;
end process;
-- Process p_push : raise stack and push address
p_push : process (clk)
begin
-- TODO: Implement
if rising_edge(clk) and instruction = "110" and unsigned(cell_value) > 0 and skip_internal = '0' then
if push_state = '0' then
-- restore push_state and push address
addr_stack(to_integer(unsigned(stack_ptr))) <= instr_addr;
push_state <= '1';
pc_enable <= '1';
else
-- raise stack, disable pc and unset push_state
stack_ptr <= std_logic_vector(unsigned(stack_ptr) + 1);
pc_enable <= '0';
push_state <= '0';
end if;
end if;
end process;
-- Process p_pop : read address to jump address and lower stack
p_pop : process (clk)
begin
-- TODO: Implement
if rising_edge(clk) and instruction = "111" and unsigned(cell_value) > 0 and skip_internal = '0' then
if push_state = '1' then
-- set address to pc_out, disable pc and unset push_state
pc_out <= addr_stack(to_integer(unsigned(stack_ptr)));
pc_enable <= '0';
push_state <= '0';
else
-- set pc to enabled, restore push_state and lower stack
pc_enable <= '1';
push_state <= '1';
stack_ptr <= std_logic_vector(unsigned(stack_ptr) - 1);
end if;
end if;
-- regulate jump
if rising_edge(clk) then
if instruction = "111" and unsigned(cell_value) > 0 and skip_internal = '0' and push_state = '0' then
jump <= '1';
else
jump <= '0';
end if;
end if;
end process;
skip <= skip_internal;
end impl;