Removed simulation duration to save time.

2023-10-05 12:30:40 +02:00
parent e27c8a4505
commit 041a3e8113
1 changed files with 1 additions and 1 deletions
--- a/fpga/Makefile
+++ b/fpga/Makefile
@@ -1,6 +1,6 @@
 CHDL		=	ghdl
 FLAGS		=	--std=08
-STOP		=	900000ns
+STOP		=	90000ns

 all:	tb/tb_bfpu.vhd src/bfpu.vhd
 	$(CHDL) -a $(FLAGS) src/alu.vhd src/branch.vhd src/cellMemory.vhd src/instructionMemory.vhd src/memoryPointer.vhd src/programCounter.vhd src/bfpu.vhd tb/tb_bfpu.vhd