History

Yannick Reiß bbdf5ece5c Copy FPGA design for use in TinyTapeout		2023-10-27 13:24:45 +02:00
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src	Copy FPGA design for use in TinyTapeout	2023-10-27 13:24:45 +02:00
tb	Copy FPGA design for use in TinyTapeout	2023-10-27 13:24:45 +02:00
LICENSE	Init TinyTapeout repository	2023-10-04 11:03:41 +02:00
Makefile	Copy FPGA design for use in TinyTapeout	2023-10-27 13:24:45 +02:00
README.md	Init TinyTapeout repository	2023-10-04 11:03:41 +02:00
States.png	Init TinyTapeout repository	2023-10-04 11:03:41 +02:00
constrainits.xdc	Copy FPGA design for use in TinyTapeout	2023-10-27 13:24:45 +02:00
info.yaml	Init TinyTapeout repository	2023-10-04 11:03:41 +02:00

README.md

Buszustände

Nachrichtenaufbau

5 Bit für 21 Zustände:

Bit(s)	Description
0	Start Symbol
1-8	Address
9	Read/Write
10	Acknoledge
11-18	Data
19	Acknoledge
20	Stop Symbol

Zustände

Idle
sende Start
sende Adresse
sende Nachrichtenrichtung
sende Acknowledge
sende Datenbyte
sende Acknowledge
sende Stop
Idle